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Intern(ASICVerificationEngineer) |
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| Intern(ASICVerificationEngineer)职位说明及要求 | |
Job Description: In this role you will participate in design and verification for highly complex digital communication and multimedia ASIC’s. Responsibilities include verification of ASIC at chip level and module level, setting up the verification flows, implementing and maintaining the test environment for chip/block level tests, defining verification plan and developing direct/random tests to verify design functionalities. Other responsibilities may include test pattern generation and support for software development. Candidate Qualifications: - MS degree in Electrical Engineering or Computer Science - Must have strong programing skills (C/C++, Verilog HDL) - Good UNIX scripting skills required, Perl/TCL/bash/csh - Familiar with one of the RISC architecture and its tool chain such as ARM, MIPS, etc. - Experience with FPGA implementations and related tools - Knowledge of system and block level reference modeling - Knowledge with graphics processing and video/audio compression algorithm is a big plus - Excellent communication and presentation skills - Well organized, methodical, and detail oriented; - Team player, and easy to work with |
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电子邮箱：xiaoyu.wei@availink.com 公司网址： |